Good news for the FPGA masses who want access to the ARM ecosystem of operating systems, tools, IP, and applications — last week Xilinx and ARM announced their collaboration to enable ARM processors and interconnect on Xilinx FPGAs. This new dimension of the Xilinx Targeted Design Platform is a dramatic shift by Xilinx, away from their traditional IBM Power PC Architecture.
Meanwhile, over on Innovation Drive, Altera is licensing the MIPS architecture, and the market awaits more information.
Having an on-FPGA ARM is not a new idea. Early this decade Altera introduced their ARM-based hard core then changed strategy toward their NIOS II soft processor. And of course Actel, Altera and Xilinx have been supporting ARM-based soft cores for some time.
The announcement reveals that Xilinx is adopting “performance-optimized ARM cell libraries and embedded memories,” conjuring images of ARM-based hard cores. They mention that the roadmap is toward “joint definition of the next-generation ARM® AMBA® interconnect technology… optimized for FPGA architectures.” This hints that the interconnect will be at least partially in the fabric as one would expect in an FPGA embedded system. How the FPGA architect extends the base system and configures and stitches the fabric remains to be seen. With only vague bits of information released there are many unanswered questions:
If you have any hard answers or guesses about what’s going on here, please to leave a comment.
Personally, I’m exited to get PDTi engineering hands on an ARM-based Xilinx dev kit so we can help our customers continue to simplify their hardware/software register interface management should they choose ARM-based Xilinx embedded systems.
[UPDATE 2009-11-05]
From the comments there are some other great questions:
While on an ocean side walk, I daydreamed of being struck by a great IP/subsystem idea with potential for royalty licensing. I imagined organizing a team and jumping into action, developing the RTL logic, and processor integration. Should I choose Virtual and/or FPGA prototyping?

ocean side walk
Virtual Platform
It’s all about getting the software working as soon as possible. The Google Android Emulator is an excellent example of how Google was able to get the software working without requiring developers to possess the device hardware. The Android Emulator is described as a “mobile device emulator — a virtual mobile device that runs on your computer.” Android abstracts the hardware, ARM processor, and Linux kernel with an Eclipse based Java framework, targeting Android’s Dalvik Virtual Machine, a register-based architecture that’s more memory efficient than the Java VM.
Virtual Prototyping
Clearly the virtual Android emulator/platform makes software development easier. Similarly, a virtual prototype makes abstract product validation easier. With a virtual prototype, the developers can explore different algorithms and architectures across the hardware and software abstractions. Things like instruction set, on-chip interconnect, acceleration, memory, interrupt, and caching architecture can be explored by digital designers and firmware ahead of the VHDL and Verilog solidification. Still, despite any effort spent on virtual prototyping, physical validation is essential before offering an IP for license. FPGA prototyping is a good choice for all but the most complex and highest performance IP.
FPGA Prototyping
Those who know firmware and RTL coding, should have no problem getting basic examples running on an FPGA dev kit in the first day or two. Those with experience validating a chip in the lab understand that so much really comes down to using embedded software to drive the tests. Today’s Embedded System FPGA kits provide on-chip processors and the whole development environment. Some available embedded FPGA processor options are listed in the following table:
| Vendor/Processor | On-chip interfaces | Tools |
|---|---|---|
| Altera NIOS II
(soft core) |
Avalon | SOPC Builder
Quartus II NIOS II IDE, with Eclipse CDT & GNU compiler/debugger |
| Xilinx PowerPC
(hard core) |
CoreConnect PLB & OPB | Embedded Development Kit (EDK), with Eclipse CDT GNU compiler/debugger
Xilinx Platform Studio (XPS) ISE |
| Xilinx MicroBlaze
(soft core) |
CoreConnect PLB & OPB | Embedded Development Kit (EDK), with Eclipse CDT GNU compiler/debugger
Xilinx Platform Studio (XPS) ISE |
| Actel ARM
(soft core) |
AMBA AHB & APB | Libero IDE, CoreConsole, SoftConsole (Eclipse, GNU Compiler/debugger) |
Short of having deep pockets for an ASIC flow, or a platform provider lined up to license the IP and spin prototype silicon, FPGA prototyping makes good sense. Virtual platforms make sense for reaching software developers, so they can interface with the IP as soon as possible. One problem with providing models for developing software before the hardware is complete is that it’s difficult to keep the different perspectives aligned as the design evolves. Tools like SpectaReg that model hardware/software interfacing and auto-generate dependent code keep the different stakeholders aligned, resulting in quicker time to revenue for the IP.
So back to my oceanside daydream… how would I get the IP to market and start making money? It depends on the target market. If the end user targets embedded system FPGAs then it’s a no brainer - go straight to FPGA prototyping and don’t worry about virtual platform. If the target market is mobile silicon platforms, then virtual prototyping/platforming makes sense. Having validated silicon in hand is ideal but impractical in many circumstances. FPGA prototyping is pretty darn compelling when you consider the speedy turnaround times, and the low startup costs.